QSAP
 QUICK SILICON ANALOG PROTOTYPING


QSAP significantly reduces overall system development risk and eliminates months from the development schedule. QSAP allows STA to emulate critical path ASIC Design elements in silicon, which in turn allows STA's customers to continue targeted product development in parallel with the ASIC integration effort.



 TIME TO MARKET


2 to 4 weeks emulation silicon for critical system blocks
In system verification of critical paths
System level development in parallel with ASIC integration 
Significantly reduced time to market
Significantly reduced risk